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This data has achieved Bronze level on 23 October 2015 which means this data makes a great start at the basics of publishing open data.

High Performance Ultra Low-Power ADCs and DACs Project

Summary

Type of release
a one-off release of a single dataset

Data Licence
Not Applicable

Content Licence
Creative Commons CCZero

Verification
automatically awarded

Release Date
9 April 2015
Modified Date
8 July 2015
Publishers
National Aeronautics and Space Administration
Keywords
completed, glenn-research-center, project
Identifier
high-performance-ultra-low-power-adcs-and-dacs-project
Landing Page
http://techport.nasa.gov/view/8889
Maintainers
TECHPORT SUPPORT hq-techport@mail.nasa.gov
Language
en-US

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Description

The objective of the Phase-I research is to design a multi-GHz high bandwidth Delta Sigma Analog-to-Digital and Digital-to-Analog converter using a deep sub-micron CMOS process. Since the Delta Sigma Modulation ADC samples in the multi-GHz range, direct sampling and conversion to digital of post LNA Microwave signals is possible. By targeting the ADC on a CMOS technology node (90nm, 65nm or 45nm), a complete all digital radio receiver and demodulator can be implemented on the same System on a Chip that performs host interface and higher network level protocols. Using Delta Sigma Modulation at GHz sampling rates eliminates the anti-aliasing filter requirement. The all digital receiver eliminates I/Q imbalance due to the receiver and DC offset introduced by zero-IF architectures. In order to support multi GHz sampling rates in CMOS, advanced time interleaving, parallel Delta Sigma Modulators and shared integrator architectures are considered. Using Micro-RDC RHBD cells and design experience the digital filtering and decimation of the high frequency bit stream are hardened. The baseband filtering is implemented with temporal latch technology for SEU immunity. In this research various hardening techniques will be used to harden the analog sub-components in the Delta Sigma Modulator including investigating pipelining and parallel processing architectures for filtering and decimation which also address low power requirements.

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This dataset has been created by US Government which means it is required to be in the public domain. However US copyright law only allows open access by US citizens, we have assumed the data is equivalently licensed as CC0 for the rest of the world as this is in the spirit of the US Government’s Open Data policy.

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